Resume examples

How to write a process engineer resume

Updated 2026-09-02

A silicon wafer's grid of iridescent dies under shallow focus

A process engineer’s resume is measured in yield, defect density, and cycle time moved, not in tools operated. A hiring manager who has owned a module reads three axes: which module was yours, which node or product, and which metric moved because of your DOE or your OCAP. A full row of tool models with no number that moved scores zero on all three.

Fabs in Taiwan, Korea, Singapore, and increasingly the United States and Europe hire from one global pool, and the equipment makers and foreign-owned fabs ask for an English resume from the first round. The reader is often not in your country. Every example on this page is in English because that is the output language. Every yield, Cpk, and hour figure stays [N]. The real numbers have to come from your own WAT and inline reports.

One thing the first sentence must settle: are you etch, thin film, lithography, CMP, diffusion and implant, or yield integration? Reviewers sort before they read, and “semiconductor process” lands in no pile. The other is confidentiality: class yes, codename and customer no. Below: section order, three summary levels, bullets grouped by competency, before-and-after rewrites, what to keep in Skills, ATS keywords, common mistakes, and the follow-up each claim invites.

What a finished one looks like

Below is a complete sample for a fictional person, rendered as a real page by the product's own sheet and scored by the same rules engine the editor uses — the number is computed, not typed in. Every figure a bullet owes is left as [N], which is why the score stops under the cap. That is not a flaw in the example; it is the product's rule, demonstrated.

Yi-Hsuan Kuo

Process Engineer · Plasma Etch & Yield Improvement
yihsuan-kuo@example.comTainan, Taiwanlinkedin.com/in/yihsuan-kuo

Education

National Cheng Kung University
M.S., Materials Science and Engineering
Sep 2016 – Jun 2018
  • Designed the thesis DOE on atomic-layer-deposition film uniformity, cutting within-wafer thickness variation by [N]% on the lab tool
  • Won the department best-thesis award for that DOE, and qualified [N] incoming students on the cleanroom ALD and plasma-etch tools as the lab’s tool owner

Experience

Advanced logic foundry
Tainan
Senior Process Engineer, Plasma Etch
Mar 2021 – Present
  • Improved contact-module yield on a [N] nm logic node by [N] points after a [N]-factor DOE isolated chamber-wall seasoning as the source of the open-contact signature
  • Cut excursion-to-containment time from [N] hours to [N] minutes by writing the OCAP that ties inline defect scans to automatic tool hold, now standard on [N] etch chambers
  • Halved the WAT parameter spread between [N] matched chambers with a per-chamber run-to-run offset, clearing the tool-matching gate a quarter ahead of plan
  • Led the root-cause investigation on a [N]-lot particle excursion, tracing it to an electrostatic-chuck coating change and securing a supplier change-notice review that has held [N] months
Display panel maker
Tainan
Process Engineer, TFT Array
Jul 2018 – Feb 2021
  • Reduced mura-related array defects by [N]% on a large-format glass line by re-centering the gate-metal etch bias with SPC limits derived from measured capability rather than vendor defaults
  • Doubled throughput of the passivation CVD step by qualifying a shorter recipe across [N] tools with a [N]-lot matching study, adding [N] thousand panels per month
  • Eliminated a recurring open-line defect worth [N] thousand panels a year by adding an inline optical inspection gate ahead of the source-drain etch
  • Standardized the FMEA and control-plan templates for [N] array process steps, cutting recipe-change approval from [N] days to [N] days

Projects

Chamber-drift early warning
Author · Python, FDC traces
2022
  • Built a Python tool that reads FDC traces from [N] million wafer runs and flags chamber drift before the SPC chart trips, adopted by [N] modules in the fab

Additional Information

Process & yield: Plasma etch, Thin-film deposition (CVD, ALD), DOE, SPC and Cpk, FMEA and control plans, Yield and defect analysis
Data & tools: JMP, Minitab, Python (pandas), FDC and APC, SEM defect review, WAT and inline data
Certifications: Six Sigma Green Belt
Languages: Mandarin (native) · English (professional working)

Structure and section order

One column, standard headings, no charts. This resume passes a parsing system first and a manager who has run a module second. Both reward plain: a screenshot of a yield curve fits neither an ATS nor a single page.

The ordering rule: moved metrics first. Yield, defect density, Cpk, and cycle time are your strongest evidence; modules and tools are their context, not the subject. Entry-level candidates put thesis work and lab process in the same seat.

  1. 1
    Summary

    Three sentences: module, node or product class, one yield-level result. Reviewers sort on this paragraph, and a vague one lands in the wrong pile.

  2. 2
    Experience

    Reverse chronological, one entry per module and product. Each bullet moves one metric; tools and methods play supporting roles. This section owns most of the page.

  3. 3
    Skills

    Three groups: modules, statistical methods, data tools. A keyword table, not a tool catalogue.

  4. 4
    Education

    Materials, chemical engineering, electrical engineering, physics. Entry-level candidates write the thesis and process-related lab work in full; after a production record this shrinks to two lines at the bottom.

  5. 5
    Patents & Publications (optional)

    One line each, with the patent number or journal name. If there are none, delete the section rather than padding it with “participated in”.

Summary examples by level

The summary lets a peer sort you in ten seconds: your module, your node, the metric you moved. One example per level, numbers left as [N] for you to fill.

Entry level

Materials engineering MS graduate with [N] months of cleanroom process work on ALD and plasma-etch tools, including a thesis DOE that cut within-wafer thickness variation by [N]% on a research tool. Comfortable with JMP, SPC charting, and SEM defect review. Looking for a module process role where I can own a recipe and a yield number.

With no production record, write the lab process in full: tool type, one DOE, one number that moved. The last sentence names what you want: a recipe and a yield number of your own.

Mid-career

Process engineer with [N] years owning plasma-etch modules on [N] nm and [N] nm logic nodes, from new-tool qualification through excursion response. Raised contact-module yield by [N] points and halved chamber-to-chamber CD offset across a [N]-chamber fleet. Prefers problems where the WAT data and the tool logs disagree.

Mid-career sorting needs all four facts: module, nodes, one yield result, one tool-matching result. The last sentence says which problems you like, which carries more information than “proactive”.

Senior

Senior process engineer leading a [N]-person etch module through [N] node ramps, owning yield targets, tool-matching gates, and the module’s FMEA. Cut mean excursion-to-containment time from [N] hours to [N] by rewriting the OCAP set and training every shift engineer on it. Turns yield reviews into decisions with a named owner and a date.

Senior evidence is what got institutionalized: the OCAP set, the FMEA, the shift engineers trained. The last sentence describes how meetings changed under you, not a self-appraisal.

Bullets grouped by competency

The skeleton never changes: verb, your module, method, [N] outcome. Node and lot count are how this role states scale. Whichever number is missing stays [N].

Yield improvement and DOE

· Raised contact-module yield on a [N] nm logic node by [N] points over two quarters, after a [N]-factor DOE isolated chamber-wall seasoning as the source of the open-contact signature.

· Cut defect density on a [N]-layer interconnect stack by [N]% with a split-lot study showing the via over-etch window had been set for the previous node.

· Owned the yield ramp of a [N] nm derivative from [N]% to the mature-node baseline in [N] months, running [N] DOEs and closing the top [N] pareto signatures.

Excursion containment and root cause

· Contained a particle excursion within [N] hours of the first out-of-control inline scan, holding [N] lots and tracing the source to a chamber-liner change through a tool-by-tool split.

· Led the failure analysis on a [N]-lot WAT shift, clearing the litho and implant modules with a commonality study before a cross-section confirmed a spacer-etch loading effect.

· Wrote the OCAP linking inline defect counts to automatic tool hold, which caught the next excursion at [N] wafers instead of [N] lots.

SPC, Cpk and process control

· Raised the Cpk of a critical-dimension parameter from [N] to [N] by tightening the run-to-run APC model and re-deriving control limits from [N] months of data.

· Reduced false out-of-control alarms by [N]% by moving [N] SPC charts from vendor-default limits to limits derived from measured capability.

· Established the measurement-system analysis routine for the module’s CD-SEM fleet, so recipe changes are judged against gauge error rather than noise.

Tool matching and new-tool qualification

· Qualified [N] new etch chambers to the golden-tool baseline in [N] weeks, matching WAT and inline data within release criteria on the first pass.

· Halved the chamber-to-chamber CD offset across a [N]-chamber fleet with a per-chamber run-to-run correction, retiring the manual recipe tweaks that had masked the drift.

Cycle time and cost

· Cut module cycle time by [N] hours per lot by merging a clean and a seasoning step, after a DOE across [N] lots showed no change in defect density.

· Saved [N] thousand dollars a year in consumables by extending the wet-clean interval on [N] chambers, backed by particle data over [N] maintenance cycles.

Cross-team work and process transfer

· Transferred a [N]-step module process to a second fab with the integration and equipment teams, reaching yield parity within [N] lots of the first production run.

· Negotiated a recipe-change window with production control that kept [N] thousand wafers of WIP moving through the qualification.

Before and after

The same experience, written weakly and then well. Weak writing in this role has fixed patterns: the tool instead of the outcome, the line instead of your module, “handled” instead of a containment time and a root cause.

Before

Responsible for etch process maintenance and daily yield monitoring.

After

Owned the contact-etch module on a [N] nm logic line, holding defect density under [N] per wafer and closing [N] yield-loss signatures in a year.

Why it works · “Responsible for” plus “monitoring” admits you watched the numbers go by. The rewrite has a module, a node, a ceiling you held, and a count of signatures you closed. Each can be probed.

Before

Handled excursions and wrote reports for management.

After

Contained [N] excursions in a year at a mean time-to-containment of [N] hours, each closed with a verified root cause and a control-plan change.

Why it works · “Handled” says nothing about how fast you contained it or whether the root cause was yours. The rewrite gives a count, a containment time, and how each one ended. A report is not an outcome; a changed control plan is.

Before

Familiar with dry-etch and CVD tools and various metrology equipment.

After

Qualified [N] plasma-etch chambers to the golden-tool baseline, matching critical dimensions and WAT within release limits on the first attempt.

Why it works · This is the role’s signature trap: a tool list with no outcome. The rewrite attaches the tools to one real qualification, with a count, a standard, and the fact that it passed first time.

Before

Worked on yield improvement projects with the integration team.

After

Raised line yield by [N] points on a [N] nm node by leading the via-etch DOE that closed the top signature on the defect pareto.

Why it works · “Worked on” is bystander language, and it credits the integration team. The rewrite draws the line around your DOE, the signature you closed, and how far yield moved.

Before

Performed DOE and SPC analysis to improve process stability.

After

Raised the Cpk of the gate critical dimension from [N] to [N] with a run-to-run APC model derived from [N] months of measured data, ending weekly manual recipe adjustments.

Why it works · DOE and SPC are methods, not outcomes. The rewrite names the parameter, the Cpk before and after, where the model’s data came from, and one routine task that disappeared.

What belongs in the skills section

Your interviewer has run a tool. Every term here must survive the question: which recipe did you change with it, and which number moved?

Worth the space

Process modules (only those you signed off)

Plasma etch · Thin film (CVD, PVD, ALD) · Lithography · CMP · Diffusion and implant

Statistics and quality methods

DOE · SPC and Cpk · MSA / Gauge R&R · FMEA and control plans · 8D

Data and analysis tools

JMP · Minitab · Python (pandas) · FDC / APC · Yield management system

Yield and failure analysis

Defect classification · SEM / TEM review · WAT and inline correlation · Commonality analysis

Cut these

  • Microsoft Office / Excel · Assumed for this role. Listing it suggests you had nothing stronger to say.
  • Good communication, team player · Adjectives nobody can check. A bullet about a recipe-change window negotiated with production control proves the same thing, and it can be checked.
  • A full row of tool brands and model numbers · The interviewer asks what you changed on the tool and what moved. Keep the module names and the methods; leave the catalogue.
  • “Familiar with semiconductor process” · Familiarity is a claim with no evidence behind it. Evidence in this field is a metric that moved, and it belongs in Experience.

ATS keywords

The terms that recur in fab and equipment-maker job descriptions are the ones parsers match. Use only the ones you have done, spelled the way the posting spells them.

Core domain
process engineeringyield improvementprocess integrationprocess developmentmodule ownership
Methods
DOESPCCpkFMEAMSA8Droot cause analysis
Process modules
plasma etchCVDPVDALDlithographyCMPion implantation
Data
WATinline defectFDCAPCJMPPython
Outcome language
yielddefect densitycycle timeexcursiontool matchingqualification

List only what you have done and can defend. Your interviewer has stood at the same tool, and one keyword you cannot hold costs more than a blank. Stuffing does not move the parser, and a human reader hears noise.

The proof off the page, and the line that points at it

This role has no portfolio. The yield you moved, the wafer maps, the SEM images, the recipe: all of it belongs to the fab, and none of it leaves with you. So a reader checks three other things — patents, publications, and certifications that carry a number — and then a fourth, which is somebody who worked with you.

  • A patent puts your name, your employer and your years in a public register

    It is the one thing a process engineer can show without breaking anything. Inventor search works on Google Patents, Espacenet and most national patent offices, so a reader sees the assignee, the filing year and which module the claims describe without asking you a question. One line carries it: “US [N] B2 — Method for … (co-inventor, assigned to employer).” Copy the number correctly. A number that does not resolve reads as invented, and it takes one search to find that out.

  • A disclosure, a filing, a publication and a grant are four different claims

    An internal invention disclosure has no number and exists nowhere a reader can look, so calling it a patent is a false statement rather than a rounding. A filing has an application number that stays private until publication. A published application is public and still not granted. Only a grant has a patent number. Write the stage you are at: “[N] patents granted, [N] applications published.” The person reading has probably been named on one, knows how an IP pipeline works inside a fab, and will ask which office and which year. Inventor order carries no ranking either, so write co-inventor instead of implying you led it.

  • Papers, conference posters, and the thesis nobody thinks to list

    The public venues here are IEDM, the VLSI Symposium, ASMC, ECS and MRS. A poster counts: title, author list and year are all public, so a reader can confirm you stood there and presented. Write “Poster, ASMC [N] — title” and attach no data. For a new graduate the master’s thesis is usually the only public document that exists, and most university repositories are searchable by author, so the title and year beat any sentence about lab experience. Anything still in review says under review and names the venue. Under review is a real status; published is a different one.

  • A certification is only checkable if it names an issuer and a number

    Six Sigma is where this goes wrong most often. A belt from an employer’s internal program sits in no register and cannot be verified from outside; an ASQ certification has a number and a public lookup. Both are worth writing, as long as the line says which one it is: “ASQ Certified Six Sigma Green Belt, cert. no. [N]” and “Six Sigma Green Belt (internal program, [employer])” are two honest lines, while a bare “Six Sigma Green Belt” lets the weaker one pass as the stronger. Same for the chemical-handling and cleanroom training your site required — if the certificate has a number, write the number. Once a reader finds one entry that does not check out, every other entry gets checked too.

  • Defect maps, wafer maps and recipes never go online

    This is where the role differs from every other engineering role on this site: you have no work you are permitted to publish. A defect pareto, an SEM image, a WAT report, an FDC trace, a fragment of a recipe — posted to LinkedIn or appended to a resume PDF, each is a security incident and not evidence. The empty GitHub field on the sample above is deliberate. When the code you are proudest of reads fab data, the right move is to leave the link off. If you want a public repository, rebuild the analysis on synthetic or open data, say so in the first line of the README, and confirm the commit history no longer holds the original files.

  • The check that matters in this industry is a conversation, not a link

    Module communities are small enough that a hiring manager usually knows somebody from your last employer, and one call settles which chamber you owned and whether that containment was yours. So write the module, the node class and the start and end months in the version your former manager would repeat word for word. Delete “References available upon request”: it carries no information, and the space is better spent on something a reader can go and verify. Internal work you can describe but never show — the OCAP you wrote, the FMEA you own, the shift engineers you trained — goes on the page as shape and count, never as content.

Common mistakes on process engineer resumes

  1. 1
    A row of tool models with no number that moved

    The tools belong to the company. The yield you moved belongs to you. Every entry must answer: which module, which node, which metric went from what to what.

  2. 2
    Yield figures with no baseline

    “Improved yield by [N]%” with no starting point, node, or time window reads like the line ramping by itself. Write from [N] to [N], on which node, over how many quarters.

  3. 3
    Excursions written as “handled”

    A reader from a fab wants three things about an excursion: how fast it was contained, what the root cause was, and which control changed afterwards. Missing any one leaves a sentence with nothing in it.

  4. 4
    Writing product codenames and customer names

    Codenames breach NDAs and mean nothing outside the company. Describe by class: a [N] nm logic node, a large-format panel line. Relative yield changes are fine. Customers never are.

  5. 5
    No way to tell which module was yours

    Sorting is the reviewer’s first act, and “semiconductor process engineer” lands in no pile. The first sentence of the summary names etch, thin film, lithography, or CMP.

  6. 6
    Wearing the whole line’s yield as your contribution

    Line yield is the sum of dozens of modules. The first follow-up is always which signature your DOE moved. Write your module and your signature. A narrow claim you can defend outranks a wide one you cannot.

The follow-up each claim invites

Every follow-up in this field tests one thing: did your DOE move that number, or did the line ramp on its own? Think three levels down before a claim goes on the page.

The line on the resume

Raised contact-module yield by [N] points.

The follow-up it triggers

What was the starting point? What else did the integration team change that quarter? How do you know it was your DOE and not the line ramping on its own?

What you must produce

The yield definition (module or line), the baseline period, the split-lot control group, and a list of concurrent changes. Without a control group, the number gets credited to the line.

The line on the resume

Contained a particle excursion within [N] hours.

The follow-up it triggers

Which chart gave the first signal? How many lots did you hold, what was the release criterion, and how was the root cause confirmed?

What you must produce

A timeline to the hour: signal, hold, tool-by-tool split, root-cause confirmation, release. If you can say what each step ruled out, the containment was yours.

The line on the resume

Raised the Cpk of the gate critical dimension from [N] to [N].

The follow-up it triggers

Which spec did you compute Cpk against? Did you run an MSA? How long was the sample window, and did you exclude excursion periods?

What you must produce

The Gauge R&R figure, the data window, how the control limits were derived, and the inputs to the APC model. This question separates the person who computed the Cpk from the person who read it on a report.

The line on the resume

Qualified [N] chambers to the golden-tool baseline.

The follow-up it triggers

Who set the matching criteria? Which parameter was hardest to match? What happened to the chamber that did not pass?

What you must produce

One chamber you actually chased: the parameter that drifted, the three things you tried, how it converged. Without that detail, the credit goes to the equipment engineers.

The line on the resume

Cut module cycle time by [N] hours per lot.

The follow-up it triggers

How was the risk of merging two steps assessed? Who signed it off? Did you go back and check defect density after release?

What you must produce

The FMEA change record, the DOE sample size, the sign-off chain, and the post-release tracking data. Cycle-time gains are suspected of being paid for in yield, and the interviewer will ask about that trade directly.

FAQ

My job is mostly watching tools, SPC charts, and daily reports. I have never run a big yield project. What do I write?

Trace one level upstream: the out-of-control point you caught, the control limit you re-derived, the chamber drift you spotted before the chart tripped. All of that is excursion-level material you have been filing as routine.

If an honest inventory turns up nothing, that is useful too: it says the next role should be one that gives you a recipe and a number to own.

I am under NDA. How much yield, node, and customer detail can I write?

Class yes, codename no. “A [N] nm logic node” and “a large-format panel line” let a peer place you without exposing the product. Write yield as a relative change ([N] points), never as an absolute value, and never name a customer.

When something feels borderline, describe it one level more generally and add the detail out loud in the interview.

My process experience is in display panels or PCB. How do I map it to a semiconductor employer?

The methods are shared: DOE, SPC, FMEA, and excursion containment look the same in all three industries. Write in that shared method language and translate module names into analogies the reader knows: array thin film and etch map onto front-end thin film and etch.

Label the industry honestly. A “wafer” that turns out to be a glass substrate reprices the whole resume.

I am applying to an equipment maker rather than a fab. Does the resume change?

Yes. An equipment maker’s process engineer serves customer tools, so the evidence is qualifications, tool matching, and the containment time on customer escalations. A fab reads for yield ownership. For the same history, move the new-tool and matching bullets up when the target is an equipment maker.

The English bar is also higher there: the hiring manager is often on another continent, and the summary has to read cleanly on its own.

I am a new graduate with only a thesis and lab process work. Can that count as experience?

Yes, in Education or Projects, with the research context stated honestly. One experiment with a DOE, real measurements, and a number that moved is genuine evidence at entry level: write the tool type, the experiment you designed, the result, and how you read it.

Dressing it up as production experience reprices the resume. A manager who has run a tool needs two questions to find out.

Write the yield you moved the way a peer reads it

Describe your module, node, and the metrics that moved, in plain language. The Tech lens rewrites them into English at the level on this page. The 0–100 score comes from a rules engine, so the same draft always scores the same. Every missing yield, Cpk, or hour figure stays a yellow [N] placeholder for you to pull from your own WAT reports. No invented numbers, ever.

Try 2 free drafts

Keep reading

More Tech resume examples